Qus : 1 MCA NIMCET PYQ 5

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1 2 milliseconds
2 1.5 milliseconds
3 1.85 microseconds
4 1.85 milliseconds
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MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2018 PYQ

Qus : 2 MCA NIMCET PYQ 4

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1

Faster than hard wired unit.

2 Slower than hard wired unit.
3 To facilitate easy implementation of new instructions.
4 Both (2) and (3).
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MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2009 PYQ

Qus : 3 MCA NIMCET PYQ 2

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1 0, 0, 0
2 1, 1, 0
3 1, 1, 1
4 0, 1, 0
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MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2008 PYQ

Qus : 4 MCA NIMCET PYQ 3

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1 It doesn’t allow simultaneous access to the intended data and its tag
2 It is more expensive than other type of organization
3 The cache hit ratio is degraded if two or more blocks used alternatively map onto the same block frame in the cache.
4 The number of blocks required for the caches increases linearly with the size of the main memory.
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MCA NIMCET Previous Year PYQ MCA NIMCET NIMCET 2008 PYQ

[{"qus_id":"16514","year":"2009"},{"qus_id":"16623","year":"2008"},{"qus_id":"16627","year":"2008"},{"qus_id":"3841","year":"2018"}]