✅ Concept:

In modern processors, to improve performance, the CPU often overlaps the fetch, decode, and execute stages of multiple instructions. This overlapping is known as:

Instruction Pipelining

✅ Example:

• Instruction 1: Being executed
• Instruction 2: Being decoded
• Instruction 3: Being fetched

This overlapping allows multiple instructions to be processed simultaneously at different stages of the pipeline, improving throughput.

✅ Final Answer: $\boxed{\text{Instruction Pipelining}}$